VHDL10327错误!!!

2024-12-31 13:27:57
推荐回答(1个)
回答1:

请不要将bit类型与std_logic类型混用。将RA : OUT BIT RM : OUT BIT_VECTOR (7 downto 0);改成RA : OUT std_logic RM : OUT std_logic_VECTOR (7 downto 0);