推荐回答(1个)
(1)增强型8051CPU-CIP-51微控制器
C8051F040单片机系统控制器的内核采用CIP-51微控制器,它与MCS-51指令集完全兼容,可以使用标准803x/805x汇编器和编译器进行软件开发。CIP-51内核具有标准8052的所有外设部件,包括5个16位的计数器/定时器、两个全双工UART串行接口、256字节内部RAM、128字节特殊功能寄存器(SFR)地址空间及8个8位宽的I/O端口。
(2)速度提升
CIP-51采用流水线结构,与标准的8051结构相比指令执行速度有很大的提高。在标准8051中,除MUL和DIV以外所有指令都需要12或24个系统时钟周期,最大系统时钟频率为12-24MHz。而对于CIP-51内核,70%的指令的执行时间为1或2个系统时钟周期,只有4条指令的执行时间大于4个系统时钟周期。CIP-51共有111条指令。CIP-51工作在最大系统时钟频率25MHz时,其峰值性能达到25MIPS。下表列出了指令条数与执行
时所需的系统时钟周期数的关系:
表3-1 CIP-51内核指令条数与系统时钟周期数的关系 指令周期数 1 2 2/3 3 3/4 4 4/5 5 8 指令数 26 50 5 16 7 3 1 2 1 (3)功能改进
C8051F040系列MCU对CIP-51内核和外设有几项关键性的改进,提高了整体性能,更易于最终应用。标准8051只有7个中断源,C8051F04x系列MCU通过对内核中断系统的扩展,可向CIP-51提供20个中断源。允许大量的模拟和数字外设中断微控制器。
MCU可有多达7个复位源:一个片内VDD监视器、一个看门狗定时器、一个时钟丢失检测器、一个由比较器0提供的电压检测器、一个软件强制复位、CNVSTR0输入引脚及/RST引脚。/RST引脚是双向的,可接受外部复位或将内部产生的上电复位信号输出到/RST引脚。除了VDD监视器和复位输入引脚以外,每个复位源都可以由用户用软件禁止。
(4)其他设备
◆控制器局域网(CAN2.0B)控制器,具有32个消息对象,每个消息对象有其自的标识符;
◆全速、非侵入式的在系统调试接口(片内);
◆100 ksps的12位ADC,带PGA和8通道模拟多路开关;
◆允许高电压差分放大器输入到12位ADC(60V峰-峰值),增益可编程;
◆500 ksps的8位ADC,带PGA和8通道模拟多路开关;
◆两个12位DAC,具有可编程数据更新方式;
◆64KB的可在系统编程的FLASH存储器;
◆4352(4K+256)字节的片内RAM;
◆可寻址64KB地址空间的外部数据存储器接口;
◆硬件实现的SPI、SMBus/I2C总线接口;
◆具有6个捕捉/比较模块的可编程计数器/定时器阵列;
◆片内看门狗定时器、VDD监视器和温度传感器。
(5)可编程数字I/O端口和交叉开关
C8051F040中除具有4个标准的8051端口P0、P1、P2、P3外,还附加了4个端口P4、P5、P6、P7。这64个多功能的I/O端口每个引脚都可以被配置为漏极开路或推挽输出方式,方便用户使用[6]。
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